AMD Opteron Processors are
identified by a three digit model number, XYY, where:
X—indicates the maximum scalability of the
processor. In other words:
100 Series = 1-way servers and workstations
200 Series = Up to 2-way servers and workstations
800 Series = Up to 8-way servers and workstations
YY—indicates relative performance within the
series. In other words, an AMD Opteron Processor Model 244 is
higher performing than an AMD Opteron Processor Model 242, etc.
Low-power AMD Opteron Processors are identified by a two
character modifier, where:
HE—indicates a 55W processor within the series.
EE—indicates a 30W processor within the series.
The chart below further explains the differences between AMD
Opteron Processor series and model numbers.
|
Series |
100 Series
|
200 Series
|
800 Series
|
| Scalability |
1-way
|
Up to 2-way
|
Up to 8-way
|
| Performance |
|
| Frequency |
Model Numbers
|
|
1.4GHz
|
Model 140
|
Model 240
|
Model 840
|
|
1.6GHz
|
Model 142
|
Model 242
|
Model 842
|
|
1.8GHz
|
Model 144
|
Model 244
|
Model 844
|
| 2.0GHz |
Model 146
|
Model 246
|
Model 846
|
| 2.2GHz |
Model 148
|
Model 248
|
Model 848
|
| 2.4GHz |
Model 150
|
Model 250
|
Model 850
|
| Low-Power Options |
|
| EE (30W) Frequency |
Model Numbers
|
| 1.4GHz |
Model 140 EE |
Model 240 EE |
Model 840 EE |
| HE (55W) Frequency |
Model Numbers
|
| 2.0GHz |
Model 146 HE |
Model 246 HE |
Model 846 HE |
| Integrated memory controller |
Yes
|
Yes
|
Yes
|
| Memory controller width |
128-bit
|
128-bit
|
128-bit
|
| ECC DRAM protection |
Yes
|
Yes
|
Yes
|
| HyperTransport™ Technology |
Yes
|
Yes
|
Yes
|
| HyperTransport Links (total/coherent) |
3/0
|
3/1
|
3/3
|
| HyperTransport Link width |
16 bits x
16 bits
|
16 bits x
16 bits
|
16 bits x
16 bits
|
| HyperTransport bus frequency |
800MHz
|
800MHz
|
800MHz
|
| AMD64 |
Yes
|
Yes
|
Yes
|
| Simultaneous 32 & 64-bit computing |
Yes
|
Yes
|
Yes
|
| L1 Cache Size (data/instruction) |
64KB/
64KB
|
64KB/
64KB
|
64KB/
64KB
|
| L2 Cache Size |
1MB
|
1MB
|
1MB
|
| Pipeline stages (integer/floating point) |
12/17
|
12/17
|
12/17
|
| L1/L2 data cache protection |
ECC
|
ECC
|
ECC
|
| L1/L2 instruction cache protection |
Parity
|
Parity
|
Parity
|
| Global History Counter Entries |
16K
|
16K
|
16K
|
| L1 TLB entries (data/instruction) |
40/40
|
40/40
|
40/40
|
| L1 associativity (data/instruction) |
Full/Full
|
Full/Full
|
Full/Full
|
| L2 TLB entries (data/instruction) |
512/512
|
512/512
|
512/512
|
| L2 associativity (data/instruction) |
4-way /
4-way
|
4-way /
4-way
|
4-way
/ 4-way
|
| Direct Connect Architecture |
Yes
|
Yes
|
Yes
|
| Process |
.13 micron SOI
|
.13 micron SOI
|
.13 micron SOI
|
| Manufactured In |
Fab 30, Dresden Germany
|
Fab 30, Dresden Germany
|
Fab 30, Dresden Germany
|
